ICFP Contest 2006
Team: Abstraction Anonymous

balance.txt

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  1. % cat README
  2.  
  3. ,-'~~~'-,
  4. .~ `. ~.
  5. / 8 | \
  6. : ,' :
  7. | .--~ |
  8. ! ; !
  9. \ | 8 /
  10. `. ', .'
  11. `-.___.-`
  12.  
  13. B A L A N C E
  14. User's Manual
  15.  
  16.  
  17. I. Introduction
  18.  
  19. Night and day. Beauty and truth. Oxygen and phlogiston. Everywhere we
  20. look there are perfect opposites. Balance is a programming language
  21. based on the concept of harmoniously coexisting duals. In this
  22. language, every operation has an equal and opposite reaction. This
  23. ensures that the machine state does not stray from equilibrium.
  24. Because it performs two operations for each instruction, the language
  25. is also twice as fast as single-operation languages.
  26.  
  27. Balance programs are run inside an 8-bit machine with the following
  28. features:
  29. * CODE: an arbitrarily long immutable stream of bytes
  30. * M[0..255]: 256 8-bit bytes of memory
  31. * IP: the instruction pointer (an arbitrary non-negative value)
  32. * IS: the instruction speed (ranging from -16 to +15)
  33. * sR[0..3]: four 8-bit source registers
  34. * dR[0..1]: two 8-bit destination registers
  35. * four instructions
  36.  
  37. Each instruction is specified by a single 8-bit byte. The bits
  38. are numbered from most to least meaningful as follows:
  39.  
  40. lmb
  41. .--------.
  42. |76543210|
  43. `--------'
  44. mmb
  45.  
  46. * The bits 7,6,5 specify the opcode
  47. and depending on the instruction:
  48. * bits 4,3,2,1,0 specify an immediate value IMM
  49. or
  50. * bit 4 denotes a destination register D
  51. * bits 3,2 denote the first source register S1
  52. * bits 1,0 denote the second source register S2
  53.  
  54. Every problem in computer science can be solved by an additional layer
  55. of indirection. Balance thus provides this facility automatically:
  56. Each of the source and destination registers is an indirect register.
  57. For instance, most instructions do not work on the contents of
  58. registers S1 and S2 directly, but use the contents of S1 and S2 as
  59. indices into the memory M. The result is not stored in D, but rather
  60. stored in the memory location indicated by the current contents of D.
  61.  
  62. The machine begins with IP = 0 and IS = 1. At each step of the
  63. machine, an instruction is fetched from CODE[IP] (where CODE[0] is the
  64. first instruction, CODE[1] the second, etc.). The instruction is
  65. executed, and then IP is increased (or decreased) by the value of IS,
  66. modulo the length of CODE.
  67.  
  68.  
  69. II. Instruction Reference
  70.  
  71. The four instructions of Balance are MATH, LOGIC, SCIENCE, and
  72. PHYSICS. The following is their specification; some examples are
  73. given in a separate section below.
  74.  
  75.  
  76. Opcode (bits) Description
  77. MATH 001
  78. MATH performs addition and its dual, subtraction.
  79. These act on different registers so that the math is
  80. not undone. All operations are modular with respect
  81. to the number of relevant bits. Source registers are
  82. represented with two bits, so if S1 is 3, then
  83. sR[S1+1] is sR[0]. Similarly, dR[1+1] is dR[0].
  84. Quantities in memory are eight bits, so 250 + 20 is
  85. 14.
  86.  
  87. M[ dR[D+1] ] <- M[ sR[S1+1] ] - M[ sR[S2+1] ]
  88. M[ dR[D] ] <- M[ sR[S1] ] + M[ sR[S2] ]
  89.  
  90. LOGIC 010
  91. LOGIC performs bitwise 'and' as well as its perfect
  92. dual, bitwise 'exclusive or.'
  93.  
  94. M[ dR[D+1] ] <- M[ sR[S1+1] ] XOR M[ sR[S2+1] ]
  95. M[ dR[D] ] <- M[ sR[S1] ] AND M[ sR[S2] ]
  96.  
  97. SCIENCE 000
  98. SCIENCE tests a hypothesis and determines the speed
  99. at which the program progresses. When executed, it
  100. sets the instruction speed IS to immediate value IMM,
  101. as long as the memory cell indicated by sR[0] does
  102. not contain 0. Because this instruction behaves
  103. specially when the memory cell contains 0, it also
  104. behaves specially if IS is set to zero: the machine
  105. then halts. The value IMM is treated as a signed
  106. five-bit number in two's complement form, so it can
  107. take on values from -16 to +15.
  108.  
  109. if M[ sR[0] ] = 0 then (nothing)
  110. otherwise IS <- IMM
  111.  
  112. if IS = 0 then HALT
  113. else (nothing)
  114.  
  115. PHYSICS 011
  116. PHYSICS changes what the registers reference, in both
  117. a linear and angular way. The immediate value IMM,
  118. treated as a signed five-bit number, is added to the
  119. register sR[0] so that it may reference a different
  120. memory cell. The instruction also rotates the values
  121. between some subset of the registers, according to a
  122. bitmask derived from IMM. The source register sR[0]
  123. is always part of the rotated set, so the bitmask
  124. used is a 6 bit number where the lowest 5 bits are
  125. the same as IMM and the sixth bit is always 1.
  126. sR[0] <- sR[0] + (IMM as signed 5-bit number)
  127. let L=L0,...,L4 be the registers
  128. dR[1], dR[0], sR[3], sR[2], sR[1]
  129. then let C be the list of n elements Li
  130. such that bit i is set in IMM
  131. (bit 0 is the least significant,
  132. bit 4 is the most significant)
  133. then let Cs be the list (sR[0], C0, ..., C(n-1))
  134. and let Cd be the list (C0, ..., C(n-1), sR[0])
  135. then, simultaneously
  136. Cd0 <- Cs0
  137. ...
  138. Cdn <- Csn
  139.  
  140. Any other opcode stands for the instruction BAIL, which will cause the
  141. machine to terminate in failure. Programmers sometimes insert such
  142. bugs deliberately in order to quickly halt the interpreter during
  143. testing.
  144.  
  145.  
  146. III. Examples
  147.  
  148. If M[sR[0]] = 0, IP = 3, IS = 6, length(CODE) = 100,
  149. and CODE[IP] = SCIENCE 12,
  150. then in the next cycle IP = 9 and IS = 6.
  151.  
  152. If M[sR[0]] = 9, IP = 3, IS = 6, length(CODE) = 100,
  153. and CODE[IP] = SCIENCE 12,
  154. then in the next cycle IP = 15 and IS = 12.
  155.  
  156. If sR = {0, 1, 2, 3}, dR = {4, 5}, M = {2, 3, 5, 7, 11, 13, 17, ...},
  157. and CODE[IP] = MATH (0, 3, 1)
  158. then in the next cycle M = {2, 3, 5, 7, 10, 253, 17, ...}.
  159.  
  160. If sR = {0, 1, 2, 3}, dR = {4, 5}, M = {2, 3, 5, 7, 11, 13, 17, ...},
  161. and CODE[IP] = LOGIC (0, 3, 1)
  162. then in the next cycle M = {2, 3, 5, 7, 7, 32, 17, ...}.
  163.  
  164. If sR = {0, 1, 2, 3}, dR = {4, 5}
  165. and CODE[IP] = PHYSICS -1
  166. then sR[0] is updated with sR[0] + -1 = 255
  167. and in the next cycle sR = {1, 2, 3, 4}, dR = {5, 255}.
  168.  
  169. If sR = {0, 1, 2, 3}, dR = {4, 5}
  170. and CODE[IP] = PHYSICS 16
  171. then sR[0] is updated with sR[0] + 16 = 16.
  172. The bitmask for rotation is 1 1 0 0 0 0
  173. for the register set {16, 1, 2, 3} {4, 5},
  174. so in the next cycle sR = {1, 16, 2, 3}, dR = {4, 5}.
  175.  
  176. If sR = {0, 1, 2, 3}, dR = {4, 5}
  177. and CODE[IP] = PHYSICS 15
  178. then sR[0] is updated with sR[0] + 15 = 15.
  179. The bitmask for rotation is 1 0 1 1 1 1
  180. for the register set {15, 1, 2, 3} {4, 5}
  181. so in the next cycle sR = {2, 1, 3, 4}, dR = {5, 15}.
  182.  
  183.  
  184. IV. Syntax
  185.  
  186. The Balance language concrete syntax is simply a single line of bytes,
  187. each written as two hexadecimal digits, with no whitespace or other
  188. characters.
  189.  
  190.  
  191. V. Balance Certified Professional Program (BCPP)
  192.  
  193. As a professional programmer, you are invited to join one of the
  194. industry's leading programmer certification programs. BCPP
  195. certification can be obtained automatically by solving a series of
  196. challenge problems and verifying the results using the supplied
  197. program "certify".
  198.  
  199. Please see the file PUZZLES for the list of challenge problems. To
  200. certify a solution, stored in a file called "solve.bal", to the
  201. problem called "prop", run the command
  202.  
  203. certify prop solve.bal
  204.  
  205. Because a professional programmer knows that shorter code is better
  206. code, your certified skill level depends on the length of the program
  207. that you submit to the certifier.
  208.  
  209. A challenge problem consists of a description of the initial register
  210. and memory values and the desired final configuration. A program
  211. solves the challenge if it achieves the final configuration and halts
  212. gracefully (SCIENCE 0 with M[sR[0]] <> 0).
  213.  
  214. Accepted applicants will receive an engraved sandstone diploma and
  215. will be added to the 19101 electronic edition of "Who's Who in
  216. Computerology." Please allow 4-6 weeks for delivery.
  217. % cat PUZZLES
  218. Balance Certified Professional Program Puzzles
  219.  
  220. This file contains a list of puzzles. Solutions to these puzzles may count
  221. towards your BCPP certification. Use the certify program to submit
  222. your solutions. (Note: Not all maximum scores have been attained by the
  223. BCPP organization.)
  224.  
  225.  
  226. Puzzle: stop
  227. Initial memory: M[0-5] = [0, 1, 0, 0, 0, 0]
  228. Remainder of memory initialized from /etc/passwd
  229. Initial registers: {0, 1, 2, 3} {4, 5}
  230. Final memory: Any
  231. Final registers: Any
  232. Certification point value: 5 - 10
  233.  
  234. Puzzle: stop1
  235. Initial memory: M[0-5] = [0, 1, 0, 0, 0, 0].
  236. Remainder of memory initialized from /etc/passwd
  237. Initial registers: {0, 0, 0, 0} {0, 0}
  238. Final memory: Any
  239. Final registers: Any
  240. Certification point value: 5 - 10
  241.  
  242. Puzzle: stop127
  243. Initial memory: All zeroes except for M[127] = 127
  244. Initial registers: {0, 0, 0, 0} {0, 0}
  245. Final memory: Any
  246. Final registers: Any
  247. Certification point value: 5 - 20
  248.  
  249. Puzzle: stop128
  250. Initial memory: All zeroes except for M[128] = 128
  251. Initial registers: {0, 0, 0, 0} {0, 0}
  252. Final memory: Any
  253. Final registers: Any
  254. Certification point value: 5 - 15
  255.  
  256. Puzzle: copymem
  257. Initial memory: M[0] = a, where a <> 0. M[1] = 1.
  258. All other memory locations initialized to 0
  259. Initial registers: {0, 0, 0, 0} {0, 0}
  260. Final memory: Any
  261. Final registers: At least one register should contain a
  262. Certification point value: 60 - 200
  263.  
  264. Puzzle: copyreg
  265. Initial memory: M[0-7] = [1, 2, 4, 8, 16, 32, 64, 128].
  266. All other memory locations initialized to 0.
  267. Initial registers: {a, 0, 1, 2} {3, 4} where a <> 0
  268. Final memory: At least one memory location should contain a
  269. Final registers: Any
  270. Certification point value: 60 - 200
  271.  
  272. Puzzle: swapmem
  273. Initial memory: M[0-7] = [1, 2, 4, 8, 16, 32, 64, 128].
  274. All other memory locations initialized to 0.
  275. Initial registers: {0, 1, 2, 3} {4, 5}
  276. Final memory: There exist i and j such that 0 <= i < j <= 7 and
  277. M[i] contains the original value of M[j] and M[j]
  278. contains the original value of M[i]
  279. Final registers: Any
  280. Certification point value: 10 - 40
  281.  
  282. Puzzle: swapreg
  283. Initial memory: All memory locations initialized to 1
  284. Initial registers: {0, 1, 2, 3} {4, 5}
  285. Final memory: Any
  286. Final registers: Swap any two distinct registers. The value of the
  287. other registers may be anything
  288. Certification point value: 5 - 50
  289.  
  290. Puzzle: swapreg2
  291. Initial memory: All memory locations initialized to 1
  292. Initial registers: {a, b, c, d} {x, y} where a, b, c, d, x, y <> 0
  293. Final memory: Any
  294. Final registers: Swap any two distinct registers. The value of the
  295. other registers may be anything
  296. Certification point value: 10 - 50
  297.  
  298. Puzzle: addmem
  299. Initial memory: M[0] = a, M[1] = b, where a, b <> 0
  300. All other memory locations initialized to 0
  301. Initial registers: {0, 1, 2, 3} {4, 5}
  302. Final memory: M[2] = a + b
  303. Final registers: Any
  304. Certification point value: 5 - 40
  305.  
  306. Puzzle: addmem2
  307. Initial memory: M[0] = a, M[1] = b, where a, b <> 0
  308. All other memory locations initialized to 0
  309. Initial registers: {0, 1, 2, 3} {4, 5}
  310. Final memory: M[0] = a, M[1] = b, M[2] = a + b.
  311. All other memory locations must be 0
  312. Final registers: Any
  313. Certification point value: 10 - 50
  314.  
  315. Puzzle: multmem
  316. Initial memory: M[0] = a, M[1] = b, where a, b <> 0
  317. All other memory locations initialized to 0
  318. Initial registers: {0, 1, 2, 3} {4, 5}
  319. Final memory: M[2] = a * b
  320. Final registers: Any
  321. Certification point value: 60 - 200
  322.  
  323. Puzzle: fillmem
  324. Initial memory: M[0-2] = [a, i, j], where a <> 0, 8 <= i < j <= 255
  325. All other memory locations are initialized to 0
  326. Initial registers: {0, 1, 2, 3} {4, 5}
  327. Final memory: Memory locations from 8 to (i-1) must contain 0
  328. Memory locations from i to (j-1) must contain a
  329. Memory locations from j to 255 must contain 0
  330. (all ranges are inclusive)
  331. Final registers: Any
  332. Certification point value: 60 - 200
  333.  
  334. Puzzle: clearreg
  335. Initial memory: For each i from 0 to 255, M[i] = i
  336. Initial registers: {0, 1, 2, 3} {4, 5}
  337. Final memory: Any
  338. Final registers: All registers must be set to 0
  339. Certification point value: 20 - 100
  340.  
  341. %

Hell is other programming languages. -- Sartran
Hell is that programming language! -- Dan
Ordinarily, one would enrich this language with more powerful means of computation. Instead I take a different tack... -- Harmonious Monk